Advancements in On-Chip Training for Neuromorphic Devices
Large-scale neural network models are fundamental to various AI technologies, including neuromorphic chips inspired by the human brain. However, training these networks can be laborious, time-consuming, and inefficient, as the process typically involves training the model on a computer and then transferring it to the chip. This process limits the effectiveness and application of neuromorphic chips.
Researchers at TU/e have addressed this issue by developing a neuromorphic device capable of training directly on the chip, eliminating the need to transfer pre-trained models. This innovation could lead to more efficient and specialized AI chips.
Inspired by the Human Brain
Have you ever considered the remarkable efficiency of your brain? It’s an incredibly powerful computing machine that is fast, dynamic, adaptable, and energy-efficient.
This combination of attributes has inspired researchers at TU/e, including Yoeri van de Burgt, to replicate brain functionality in technologies where learning is crucial, such as AI systems used in transportation, communication, and healthcare.
The Neural Network Connection
“At the core of such AI systems is often a neural network,” explains Van de Burgt, an associate professor at TU/e’s Department of Mechanical Engineering.
Neural networks are software models inspired by the brain, where neurons communicate through synapses, strengthening connections with more interaction. In these models, the strength of a connection between nodes is represented by a value known as the weight.
“Neural networks can tackle complex problems with large datasets, but as they expand, they come with increased energy costs and hardware constraints,” says Van de Burgt. “A promising alternative is neuromorphic chips.”
Neuromorphic Chips and Their Challenges
Neuromorphic chips, like neural networks, are inspired by brain functions, replicating processes such as neuron firing and electrical charge transfer. These chips use memristors (memory resistors) that retain information about electrical charge flow, mimicking how brain neurons store and transmit information.
However, training neuromorphic hardware presents challenges. Traditionally, training is done on a computer, and the resulting weights are then transferred to the chip. Alternatively, training can be performed directly on the hardware, but this method is labor-intensive and error-prone, as most memristors are stochastic and require individual programming and error checking.
“These methods are costly in terms of time, energy, and computing resources. To fully leverage the energy efficiency of neuromorphic chips, training should be conducted directly on the chips,” Van de Burgt explains.
Breakthrough in On-Chip Training
Van de Burgt and his team at TU/e have made significant strides by developing a neuromorphic device that supports on-chip training, as detailed in their recent paper published in *Science Advances*. This advancement eliminates the need to transfer pre-trained models to the chip, potentially leading to more efficient AI chips.
The research began with Tim Stevens during his master’s studies. “We’ve demonstrated that training can be conducted directly on hardware, avoiding the need for model transfers and paving the way for more efficient AI chips,” Stevens notes.
Collaborators, including Van Doremaele, who completed her Ph.D. in 2023, and Marco Fattori from the Department of Electrical Engineering, contributed to the hardware design, facilitating this multi-disciplinary project.
Two-Layer Network and Future Directions
The researchers successfully integrated key components for on-chip training into a single neuromorphic chip. They created a two-layer neural network using electrochemical random-access memory (EC-RAM) components, which mimic the brain’s electrical charge storage and firing. They adapted the backpropagation algorithm to suit their hardware.
With the growing demand for energy-efficient AI technologies, the ability to train neural networks on hardware with minimal energy consumption holds significant promise. The next step involves scaling up this technology, engaging with industry and research labs to develop and test larger networks with real-world data.
“We’ve demonstrated the feasibility with a small network,” says Van de Burgt. “Our goal is to expand this technology to larger networks and practical applications, ideally making such advancements a standard in AI systems in the future.”
